Bulacan, Philippines

Angelo Jacobo

Elite
@AngeloJacobo

Good morning to you

UberDDR3. Opensource DDR3 Controller

458

FPGA_Book_Experiments. My completed projects from "FPGA Prototyping by Verilog Examples" book by Pong P. Chu

189

RISC-V. Design implementation of the RV32I Core in Verilog HDL with Zicsr extension

130

OpenLANE-Sky130-Physical-Design-Workshop. Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130

88

FPGA_OV7670_Camera_Interface. Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps

81

FPGA_RealTime_and_Static_Sobel_Edge_Detection. Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

70

DDR3-Notes. My notes for DDR3 SDRAM controller

54

FPGA_SDRAM_Controller. SDRAM controller optimized to a memory bandwidth of 316MB/s

30

ULX3S_FPGA_Camera_Streaming. Verilog design files and Icestudio file for streaming the OV7670 camera using ULX3S FPGA Board

23

ULX3S_FPGA_Sobel_Edge_Detection_OV7670. Verilog design files and Icestudio file for Sobel Edge Detection with OV7670 camera using ULX3S FPGA Board

19

FPGA_Asynchronous_FIFO. FIFO implementation with different clock domains for read and write.

14

FPGA_I2C_Implementation. Bit-bang i2c protocol for interfacing with DS1307 RTC

7

Customize-Android-Apps. This contains my notes on how to customize existing Android apps such as changing app name, app icon, hiding app from the app drawer, and others.

5

Hamming-ECC. Hamming ECC Encoder and Decoder to protect memories

2

vsdstdcelldesign. This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedures on how to create a custom LEF file and plugging it into an openlane flow.

2

SDCard_Driver_Test. Vivado files for testing my SD card driver. Implemented on CMOD S7 FPGA.

2

ddr3-controller. A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs

2

rtl. temporary repo

1

demo-projects. Demo projects for various Kintex FPGA boards

1

DDR. A simple DDR3 memory controller

1

zipstormmx. ZipSTORM-MX, an iCE40 ZipCPU demonstration project

1

eth10g. 10Gb Ethernet Switch

1

Python_Scripts. Just a collection of my python scripts

1

icestudio-examples. :snowflake: Icestudio examples - Community contributions

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