sylefeb

Silice. Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.

a5k. Another World on a chip

VoxModSynth. A simple, efficient, easily hackable C++ implementation of 3d model synthesis / wave function collapse

VoxSurf. A simple, easily hackable C++ surface voxelizer (STL=>voxels)

tinygpus. TinyGPUs, making graphics hardware for 1990s games

raster2mesh. GLSL

Silixel. Exploring gate level simulation

gfxcat. A catalog of my old-school GFX effects

LibSL. My infamous LibSL library

Iron. Iron: selectively turn RISC-V binaries into hardware

openFPGALoader-online. OpenFPGALoader building for the web without phtreads (emscripten+webusb)

topopt99. A simple, easily hackable topopt code in C/C++

skidl-tools. A set of tool to interact with SKiDL and KiCad

fpga-binutils. Compilation framework for FPGA tools

mch2022-silice. Silice designs for the MCH2022 badge

timex-data-link-deadline. Deadline app for the Timex Data Link

tt-vgaviz. Extracts video signals from simulation trace files

cuda_knearests. Prototype of knearest search for points uniformly randomly distributed in space, in CUDA. Mostly toying with the idea for now.

tt09-silice-template. Submission template for Tiny Tapeout 9 - Verilog HDL Projects - Silice

Silice-Playground. C

tt07-explorer. Submission template for Tiny Tapeout 7 - Verilog HDL Projects

silice-project-template. Project template

yosys. Yosys Open SYnthesis Suite

silice-yowasp. Silice for YoWASP

ldprog. Lone Dynamics Device Programmer

tt08-fun. Verilog

doom_riscv. Doom classic port to lightweight RISC‑V

Verilog-Playground. Verilog Experiment Area

LibSL-small. A tiny subset of LibSL for use in stand-alone, no-dependency projects

sexpresso. An s-expression library for C++