Leo Moser

greyhound-ihp. Greyhound on IHP SG13G2 0.13 μm BiCMOS process

tiny-vga. Tiny VGA Pmod board designed in KiCad

qspi-pmod. A QSPI Pmod board designed in KiCad containing one Flash and two SPRAMs

chip-gallery. This is the repository where I store the layout for chips that I have designed.

sky130_leo_ip__ota5t. A simple 5-transistor OTA.

panamax-fpga. A FABulous FPGA utilizing the Panamax padframe

tt06-tiny-shader. Python

ihp-openlane-examples. Examples for running OpenLane with the IHP Open Source PDK

semicon2023-tgff. A Transmission-Gate D-FF (TGFF) for the Minimal Fab Design Contest

librelane_plugin_fabulous. A plugin to generate and stitch fabrics using FABulous.

tt05-one-sprite-pony. This SVGA Verilog design has exactly one trick up its sleeve: it displays a sprite!

leosoc-sky130. A very simple SoC

wokwi-1bit-alu. A 1-bit ALU for TinyTapeout

tt08-aicd-playground. A mixed-signal test project on Tiny Tapeout

fabulous_fabric. FABulous fabric with config files for OpenLane 2

ttsky-fabulous-fpga. Verilog

fabulous_tiles. FABulous tiles with config files for OpenLane 2

leosoc-gfmpw-1. A simple dual-core SoC with true random number generators as payload.

pmod-levelshifter. A bidirectional levelshifter designed in KiCad to control higher voltages on an FPGA

interconnect-tests. Tests for SDF interconnect support in Icarus Verilog.

sg13g2_leo_ip__ota5t. A simple 5-transistor OTA.

tt08-wirecube. A demo for the Tiny Tapeout demoscene competition

ml_nlc. NLC table replacement based on ML

tt10-tiny-shader-v2. SystemVerilog