rotfpga. A reconfigurable logic circuit made of identical rotatable tiles.
26rotfpga2. Verilog
4asicle. Verilog
4telephone-hybrid. Python
2treepram. Implements a version of the parallel random-access machine used in theoretical computer science courses with a memory sharing model based on a binary tree of processor cores.
2sky130-cellstats. Python
2cell-tester. Verilog
2tinyqv-vga-tester. Verilog
1tinyqv-baby-vga. Verilog
1ttihp0p3-r2r-dac. Verilog
1tt07-7seg. Tcl
1ks-guitar. Physically modeled guitar strings using the Karplus-Strong algorithm with some extensions by Jaffe & Smith.
1tt07-fprn. Python
1trainable-nn. Verilog
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