Faker.Net. Generate massive amounts of fake data in .NET
130hgdb. Hardware generator debugger
79pysv. Running Python code in SystemVerilog
73kratos. :crossed_swords: Debuggable hardware generator
71Sims4Tools. DEPRECATED: Please go to
67fsim. Fiber-based SystemVerilog Simulator.
25cgra_pnr. Fast PnR toolchain for CGRA
18ts-sims4. A Typescript library for Sims 4.
8systemverilog. TeX
7hgdb-debugger. TypeScript
6DQN. An efficient MAC layer protocol for IoT:rocket:
5hgdb-circt. C++
4logic. Compile-time checked and highly efficient 4-state logic implementation in C++20
4hgdb-rtl. C++
3scheduleit. Fast course scheduling
3Kuree.github.io. HTML
3bflang. Brainfuck compiler in MLIR
2uinspect. Python
2when-to-use-bbr. Python
2hgdb-firrtl. Scala
2s4p4-helper. C#
2hgdb-vitis. C++
1kratos-example.
1kratos-runtime. C
1genesis2. Python
1tiny-mapper. Python
1archipelago. Python
1h264flow. C++
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