I do digital ASIC/FPGA design and sometimes write embedded or graphics software.
misato. RISC-V Processor written in Amaranth HDL
40shdl6800. shdl6800: A 6800 processor written in SpinalHDL
25fltk-plot. An interactive plotting library for Rust
18ulx3s-nmigen-examples. nMigen examples for the ULX3S board
16vivado-picorv32. A Vivado IP package of the PicoRV32 RISC-V processor
15bitlog_clash_tutorial. Code for the Clash tutorial at Bitlog
8verilog_ips. Various IPs implemented in Verilog
7tinytapeout-4x4-multiplier. Verilog
7hackers_conversion_service_sip. A SIP service that offers a decimal to hex/bin conversion service
6vhdl_rasterizer. The "vertex shading" and rasterizer hardware used in my master thesis.
6i2s. A SpinalHDL project that outputs I2S signals on a Lattice iCEstick
5clisc-v. CLISC-V: A RISC-V (RV32I) processor written in CLaSH
3tinytapeout-tinysoc. A tiny SoC for TinyTapeout
2Artix-7-HDMI-processing. Receiving and processing 1080p HDMI audio and video on the Artix 7 FPGA
2uart_to_hdmi. Python
1PSRAM. PSRAM PMOD
1CFU-Playground. Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM).
1Chaotic-Realm. Miscellaneous webpages and tiny scripts who don't need their own repo.
1corescore. CoreScore
1tinystackproc. A tiny stack processor
1bitflipsim. A simple digital circuit simulation tool
1flplot. An interactive graph plotting library
1smash_noc. Smash NoC
1clash-j1. Implementation of the J1 stack processor in Clash
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