Sign in
Rare find
neorv32-verilog.
♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
github.com/stnolting/neorv32-verilog
by
@stnolting
Problem
Audience
Keep exploring
Updates
Founder
0
Product
0
No founder updates yet. Check back soon.
🧪
staging