This is your work, valued

Cairo, Egypt

Mohamed Gaber

Elite
@donn

LibreLane Maintainer @fossi-foundation + a bunch of other things

nudelta. Open source NuPhy Console alternative

603

difetto. [WIP] Open-source DFT flow

41

Oak.js. Online RISC-V/MIPS Assembler & Simulator

12

Phi. Hardware description language that tries not to suck

9

RiscBEE. A Barry good RV32i Verilog implementation.

3

wavedash. 🚧 SVG-based Waveform Viewer

3

Swiftlog. An IcarusVerilog VPI bridge for the Swift Programming Language.

3

yawp. Yet Another Waveform Parser

2

Oak. Aggregate assembler and simulator.

2

cpp-sdl2. Header only C++17 bindings to SDL2 (https://wiki.libsdl.org/FrontPage)

2

cvc. CVC: Circuit Validity Checker. Check for errors in CDL netlist.

2

ECGThing. It's like the ECG in the Apple Watch but bad

2

donn. Shell

2

liberty-db. Fully defined liberty (std. cells in VLSI) data structure, efficient parser & formatter

1

tinytapeout-07. Tiny Tapeout 7

1

nl2bench. Converts from combinational netlists to the BENCH format for DFT

1

mach-nix. Python

1

peertalk-simple. Communicate between iOS and Mac devices via USB

1

dotfiles. Shell

1

chipon. PyTorch to Verilog transpiler

1

donns-qiskit-tweaks. Python

1

caravel_aes_accelerator. Verilog

1

pytorch2c. A Python module for compiling PyTorch graphs to C

1

cu-gr. CUGR, VLSI Global Routing Tool Developed by CUHK

1

skywater-pdk-libs-sky130_fd_sc_hd. Verilog

1

symbiflow-arch-def-artifacts. I'm gonna upload symbiflow-arch-def artifacts here and none of you can stop me

1

minimal-js-wasm. Minimal JS/WASM Interop Example

1

reflex-bison-sample. Minimal Genivia RE-flex/Bison-based C++ LALR parser example

1

open_pdks. PDK installer for open-source EDA tools and toolchains. Distributed with a setup for the Google/SkyWater 130nm process.

1

homebrew-lemon-graph. Homebrew tap for the Library for Efficient Modeling and Optimization in Networks

1

skywater-pdk. Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

1

homebrew-lm4tools. Homebrew formula for lm4tools

1

Rexley. Open Source Regex-based SMS Filter for iOS

1

djsat-eval. Evaluating a paper for CSCE5930

1

Pathfinder. Proof-of-concept RL for achieving timing closure

1

openlane. Verilog

1

RRAD. A (somewhat) reliable protocol written on top of UDP.

1

padring. A padring generator for ASICs

1

magic. Magic VLSI Layout Tool

1

netgen. Netgen complete LVS tool for comparing SPICE or verilog netlists

1

caravel_example. Verilog

1

caravel. Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

1

SSCO. Tiny Commandline Processing Library for C++17

1

gf180mcu-pdk. PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).

1

quips. Swift packages for single source files

1

Archive. An archive of smaller projects.

1